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? 1 ? e02216-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. CXD3615R 48 pin lqfp (plastic) timing generator for frame readout ccd image sensor description the CXD3615R is a timing generator ic which generates the timing pulses for performing frame readout using the icx432/434 ccd image sensor. features ? base oscillation frequency 48.6/36.0mhz electronic shutter function supports draft, af mode h/v driver for ccd applications digital still cameras structure silicon gate cmos ic applicable ccd image sensors icx432 (type 1/2.7, 3240k pixels) icx434 (type 1/3.2, 2020k pixels) pin configuration absolute maximum ratings supply voltage v dd v ss ? 0.3 to +7.0 v vl ?10.0 to v ss v vh vl ? 0.3 to +26.0 v input voltage v i v ss ? 0.3 to v dd + 0.3 v output voltage v o1 v ss ? 0.3 to v dd + 0.3 v v o2 vl ? 0.3 to v ss + 0.3 v v o3 vl ? 0.3 to vh + 0.3 v operating temperature topr ?20 to +75 c storage temperature tstg ?55 to +150 c recommended operating conditions supply voltage v dd a, v dd b, v dd c 3.0 to 3.6 v vm 0.0 v vh 14.5 to 15.5 v vl ?7.0 to ?8.0 v operating temperature topr ?20 to +75 c 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 h2 v dd 3 v dd 4 xshp xshd test1 pblk clpdm test2 obclp adclk v ss 4 cko cki osco osci v dd 5 mcko ssi sck sen vr hr v ss 5 h1 v ss 3 v ss 2 rg v dd 2 ssgsl v dd 1 wen/fld id/exp sncsl rst v ss 1 sub v6 v3b vl v3a v1 v5b vh v5a v2 v4 vm ? groups of pins enclosed in the figure indicate sections for which power supply separation is possible.
? 2 ? CXD3615R block diagram 35 34 47 43 38 39 5 4 22 20 19 28 27 26 30 25 v4 v6 v1 v2 wen/fld id/exp obclp clpdm pblk vr hr 1 24 7 v dd 1 15 v dd 4 v ss 4 36 29 v dd 5 v ss 5 v ss 1 mcko cko cki osco osci ckg 2 18 21 test2 test1 rst 37 48 42 40 46 44 vh sub v5b v5a v3b v3a 45 41 vl vm 31 32 33 sen sck ssi v driver 6 ssgsl 3 sncsl 1/2 10 9 8 v ss 2 rg v dd 2 17 16 xshd xshp 23 adclk 14 13 12 11 v dd 3 h2 h1 v ss 3 selector selector latch ssg h/vtm sht register 1/2 sel sel
? 3 ? CXD3615R pin description pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 symbol v ss 1 rst sncsl id/exp wen/fld ssgsl v dd 1 v dd 2 rg v ss 2 v ss 3 h1 h2 v dd 3 v dd 4 xshp xshd test1 pblk clpdm test2 obclp adclk v ss 4 cko cki osco osci v dd 5 mcko i/o ? i i o o i ? ? o ? ? o o ? ? o o i o o ? o o ? o i o i ? o description gnd internal system reset input. high: normal operation, low: reset control normally apply reset during power-on. schmitt trigger input control input used to switch sync system. high: cki sync, low: mcko sync with pull-down resistor vertical direction line identification pulse output/exposure time identification pulse output. switching possible using the serial interface data. (default: id) memory write timing pulse output/field discrimination pulse output. switching possible using the serial interface data. (default: wen) internal ssg enable. high: internal ssg valid, low: external sync valid with pull-down resistor 3.3v power supply. (power supply for common logic block) 3.3v power supply. (power supply for rg) ccd reset gate pulse output. gnd gnd ccd horizontal register clock output. ccd horizontal register clock output. 3.3v power supply. (power supply for h1/h2) 3.3v power supply. (power supply for cds) ccd precharge level sample-and-hold pulse output. ccd data level sample-and-hold pulse output. ic test pin 1; normally fixed to gnd. with pull-down resistor pulse output for horizontal and vertical blanking period pulse cleaning ccd dummy signal clamp pulse output. ic test pin 2; normally fixed to gnd. with pull-down resistor ccd optical black signal clamp pulse output. the horizontal/vertical ob pattern can be changed using the serial interface data. clock output for analog/digital conversion ic. logical phase adjustment possible using the serial interface data. gnd inverter output. inverter input. inverter output for oscillation. when not used, leave open or connect a capacitor. inverter input for oscillation. when not used, fix to low. 3.3v power supply. (power supply for common logic block) system clock output for signal processing ic.
? 4 ? CXD3615R pin no. 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 symbol ssi sck sen vr hr v ss 5 vm v4 v2 v5a vh v5b v1 v3a vl v3b v6 sub i/o i i i i/o i/o ? ? o o o ? o o o ? o o o description serial interface data input for internal mode settings. schmitt trigger input serial interface clock input for internal mode settings. schmitt trigger input serial interface strobe input for internal mode settings. schmitt trigger input vertical sync signal input/output. horizontal sync signal input/output. gnd gnd (gnd for vertical driver) ccd vertical register clock output/v2 for icx434. ccd vertical register clock output/open for icx434. ccd vertical register clock output/v3a for icx434. 15.0v power supply. (power supply for vertical driver) ccd vertical register clock output/v3b for icx434. ccd vertical register clock output/open for icx434. ccd vertical register clock output//v1a for icx434. ? 7.5v power supply. (power supply for vertical driver) ccd vertical register clock output/v1b for icx434. ccd vertical register clock output//v4 for icx434. ccd electronic shutter pulse output.
? 5 ? CXD3615R electrical characteristics dc characteristics (within the recommended operating conditions) item supply voltage 1 supply voltage 2 supply voltage 3 input voltage 1 ? 1 input voltage 2 ? 2 input/output voltage output voltage 1 output voltage 2 output voltage 3 output voltage 4 output voltage 5 output voltage 6 output current 1 output current 2 pins v dd 3 v dd 2 v dd 1, v dd 4, v dd 5 rst, ssi, sck, sen test1, test2, sncsl, ssgsl vr, hr h1, h2 rg xshp, xshd, pblk, obclp, clpdm, adclk cko mcko id/exp, wen/fld v1, v3a, v3b, v5a, v5b, v2, v4, v6 sub symbol v dd a v dd b v dd c vt + vt ? v ih1 v il1 v ih2 v il2 v oh1 v ol1 v oh2 v ol2 v oh3 v ol3 v oh4 v ol4 v oh5 v ol5 v oh6 v ol6 v oh7 v ol7 i ol i om1 i om2 i oh i osl i osh conditions feed current where i oh = ? 1.2ma pull-in current where i ol = 2.4ma feed current where i oh = ? 14.0ma pull-in current where i ol = 9.6ma feed current where i oh = ? 3.3ma pull-in current where i ol = 2.4ma feed current where i oh = ? 3.3ma pull-in current where i ol = 2.4ma feed current where i oh = ? 6.9ma pull-in current where i ol = 4.8ma feed current where i oh = ? 3.3ma pull-in current where i ol = 2.4ma feed current where i oh = ? 2.4ma pull-in current where i ol = 4.8ma v1, v2, v3a/b, v4, v5a/b, v6 = ? 8.25v v1, v2, v3a/b, v4, v5a/b, v6 = ? 0.25v v1, v3a/b, v5a/b = 0.25v v1, v3a/b, v5a/b = 14.75v sub = ? 8.25v sub = 14.75v min. 3.0 3.0 3.0 0.8v dd c 0.7v dd c 0.8v dd c v dd c ? 0.8 v dd a ? 0.8 v dd b ? 0.8 v dd c ? 0.8 v dd c ? 0.8 v dd c ? 0.8 v dd c ? 0.8 10.0 5.0 5.4 ty p. 3.3 3.3 3.3 max. 3.6 3.6 3.6 0.2v dd c 0.3v dd c 0.2v dd c 0.4 0.4 0.4 0.4 0.4 0.4 0.4 ? 5.0 ? 7.2 ? 4.0 unit v v v v v v v v v v v v v v v v v v v v v v v ma ma ma ma ma ma ? 1 these input pins are schmitt trigger inputs. ? 2 this input pin is with pull-down register in the ic.
? 6 ? CXD3615R inverter i/o characteristics for oscillation (within the recommended operating conditions) item logical vth input voltage output voltage feedback resistor oscillation frequency pins osci osci osco osci, osco osci, osco symbol lvth v ih v il v oh v ol rfb f conditions feed current where i oh = ? 3.6ma pull-in current where i ol = 2.4ma v in = v dd c or v ss min. 0.7v dd c v dd c ? 0.8 500k 20 ty p . v dd c/2 2m max. 0.3v dd c 0.4 5m 50 unit v v v v v ? mhz inverter input characteristics for base oscillation clock duty adjustment (within the recommended operating conditions) item logical vth input voltage input amplitude pins cki symbol lvth v ih v il v in conditions fmax 50mhz sine wave min. 0.7v dd c 0.3 ty p . v dd c/2 max. 0.3v dd c unit v v v vp-p note) input voltage is the input voltage characteristics for direct input from an external source. input amplitude is the input amplitude characteristics in the case of input through a capacitor. switching characteristics (vh = 15.0v, vm = gnd, vl = ? 7.5v) item rise time fall time output noise voltage symbol ttlm ttmh ttlh ttml tthm tthl vclh vcll vcmh vcml conditions vl to vm vm to vh vl to vh vm to vl vh to vm vh to vl min. 200 200 30 200 200 30 ty p. 350 350 60 350 350 60 max. 500 500 90 500 500 90 1.0 1.0 1.0 1.0 unit ns ns ns ns ns ns v v v v notes) 1) the mos structure of this ic has a low tolerance for static electricity, so full care should be given for measures to prevent electrostatic discharge. 2) for noise and latch-up countermeasures, be sure to connect a by-pass capacitor (0.1f or more) between each power supply pin (vh, vl) and gnd. 3) to protect the ccd image sensor, clamp the sub pin output at vh before input to the ccd image sensor.
? 7 ? CXD3615R switching waveforms v1 (v3a, v3b, v5a, v5b) v2 (v4, v6) sub ttmh tthm vh vm vl vm vl vh vl 90% 10% 90% 10% ttlm ttlm 90% 10% 90% 10% ttlh tthl 90% 90% 10% 10% ttml 90% 10% ttml 90% 10% vcmh vcml vm vl vclh vcll waveform noise
? 8 ? CXD3615R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 vr cki c6 c6 c6 c6 c6 c6 c6 c6 c5 c5 c4 c3 CXD3615R serial interface data hr +3.3v ?7.5v +15.0v c2 c2 c2 c2 c2 r1 r1 r1 r2 r1 r1 r1 c2 c2 c2 c2 c2 c2 c2 c2 c2 c1 c1 c1 c1 c1 c1 c2 26 measurement circuit c1: 3300pf c2: 560pf c3: 820pf c4: 8pf c5: 140pf c6: 10pf r1: 30 ? r2: 10 ?
? 9 ? CXD3615R ac characteristics ac characteristics between the serial interface clocks ssi 0.2v dd c 0.2v dd c 0.8v dd c ts2 th1 ts1 ts3 0.8v dd c 0.8v dd c sck sen sen 0.2v dd c (within the recommended operating conditions) symbol t s1 t h1 t s2 t s3 definition ssi setup time, activated by the rising edge of sck ssi hold time, activated by the rising edge of sck sck setup time, activated by the rising edge of sen sen setup time, activated by the rising edge of sck min. 20 20 20 20 typ. max. unit ns ns ns ns serial interface clock internal loading characteristics (1) th1 0.2v dd c ts1 0.2v dd c v1 vr hr hr v1 sen 0.8v dd c enlarged view example: during frame mode ? be sure to maintain a constantly high sen logic level near the falling edge of the hr in the horizontal period during which v1, v3a/b and v5a/b values take the ternary value and during that horizontal period. (within the recommended operating conditions) symbol t s1 t h1 definition sen setup time, activated by the falling edge of hr sen hold time, activated by the falling edge of hr min. 0 123 typ. max. unit ns s ? restriction for the icx432 operating frequency of 24.3mhz in draft mode
? 10 ? CXD3615R serial interface clock internal loading characteristics (2) th1 enlarged view 0.2v dd c ts1 0.2v dd c vr hr vr hr sen 0.8v dd c example: during frame mode ? be sure to maintain a constantly high sen logic level near the falling edge of vr. (within the recommended operating conditions) symbol t s1 t h1 definition sen setup time, activated by the falling edge of vr sen hold time, activated by the falling edge of vr min. 0 200 typ. max. unit ns ns serial interface clock output variation characteristics normally, the serial interface data is loaded to the CXD3615R at the timing shown in "serial interface clock internal loading characteristics (1)" above. however, one exception to this is when the data such as stb is loaded to the CXD3615R and controlled at the rising edge of sen. see "description of operation". 0.8v dd c sen output signal tpdpulse (within the recommended operating conditions) symbol t pdpulse definition output signal delay, activated by the rising edge of sen min. 5 typ. max. 100 unit ns ? restriction for the icx432 operating frequency of 24.3mhz in draft mode
? 11 ? CXD3615R rst loading characteristics rst 0.2v dd c tw1 0.2v dd c (within the recommended operating conditions) symbol t w1 definition rst pulse width min. 35 typ. max. unit ns vr and hr phase characteristics vr hr ts1 th1 0.2v dd c 0.2v dd c 0.2v dd c (within the recommended operating conditions) symbol t s1 t h1 definition vr setup time, activated by the falling edge of hr vr hold time, activated by the falling edge of hr min. 0 0 typ. max. unit ns ns hr loading characteristics hr mcko ts1 th1 0.2v dd c 0.8v dd c 0.2v dd c mcko load capacitance = 10pf (within the recommended operating conditions) symbol t s1 t h1 definition hr setup time, activated by the rising edge of mcko hr hold time, activated by the rising edge of mcko min. 13 0 typ. max. unit ns ns output variation characteristics wen/fld and id/exp load capacitance = 10pf (within the recommended operating conditions) symbol t pd1 definition time until the above outputs change after the rise of mcko min. 20 typ. max. 60 unit ns 0.8v dd c mcko wen/fld, id/exp tpd1
? 12 ? CXD3615R l act act act ? l act act act l l ? ? vm vm vm ? vm vm vm ? vm vm vl description of operation pulses output from the CXD3615R are controlled mainly by the rst pin and by the serial interface data. the pin status table is shown below, and the details of serial interface control are described on the following pages. pin status table pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 symbol v ss 1 rst sncsl id/exp wen/fld ssgsl v dd 1 v dd 2 rg v ss 2 v ss 3 h1 h2 v dd 3 v dd 4 xshp xshd test1 pblk clpdm test2 obclp adclk v ss 4 cam slp stb rst pin no. 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 symbol cko cki osco osci v dd 5 mcko ssi sck sen vr ? 1 hr ? 1 v ss 5 vm v4 v2 v5a vh v5b v1 v3a vl v3b v6 sub cam slp stb rst act act act act act act act act act act act act act act act act act act act act act act act act act act act l l vm vm vh vh vh vh vh vm vh l act act act l act act act l l vm vm vh vh vh vh vh vm vh act act act act act dis dis dis h h vm vm vl vl vm vm vm vl vl sst sst ? act act l l act ? ? l ? ? l l ? ? l l ? l l ? l l ? act act act act act act act act act act act act act act act act l l act l l l l l l l l l act act l l act l l l l l l l l l l act l l act act act act act act h h h act ? 1 it is for output. for input, all items are ? act ? . note) act means that the circuit is operating, and dis means that loading is stopped. l indicates a low output level, and h a high output level in the controlled status. also, vh, vm and vl indicate the voltage levels applied to vh (pin 41), vm (pin 37) and vl (pin 45), respectively, in the controlled status.
? 13 ? CXD3615R serial interface control the CXD3615R basically loads and reflects the serial interface data sent in the following format in the readout portion at the falling edge of hr. here, readout portion specifies the horizontal period during which v1, v3a/b and v5a/b, etc. take the ternary value. note that some items reflect the serial interface data at the falling edge of vr or the rising edge of sen. ssi sck sen 00 01 02 03 04 05 06 41 42 43 44 45 46 47 these are two categories of serial interface data: the CXD3615R drive control data (hereafter ? control data ? ) and electronic shutter data (hereafter ? shutter data ? ). the details of each data are described below.
? 14 ? CXD3615R data d00 to d07 d08 d09 to d11 d12, d13 d14, d15 d16 d17 d18, d19 d20 d21 d22 to d30 d31 d32 d33 d34, d35 d36, d37 d38, d39 d40 to d47 symbol chip ctg ? mode ? ntpl ccd ? smd htsg ? fld fgob exp ptob ldad stb ? function chip enable category switching ? drive mode switching ? internal ssg function switching ? 1 ccd switching ? 1 ? electronic shutter mode switching ? 2 htsg control switching ? 2 ? wen/fld output switching wide obclp generation switching id/exp output switching obclp waveform pattern switching adclk logic phase adjustment standby control ? data = 0 data = 1 10000001 enabled other values disabled see the category section. ?? see the drive mode section. ?? ntsc pal icx432 icx434 ?? off on off on ?? wen fld off on id exp see the obclp waveform pattern section. see the adclk logic phase section. see the standby section. ?? control data rst all 0 0 all 0 0 0 0 0 0 0 0 all 0 0 0 0 all 0 all 0 all 0 all 0 ? 1 see the drive mode section. ? 2 see the electronic shutter section.
? 15 ? CXD3615R data d00 to d07 d08 d09 d10 to d19 d20 to d31 d32 to d41 d42 to d47 symbol chip ctg ? svr shr spl ? function chip enable category switching ? electronic shutter vertical period specification electronic shutter horizontal period specification high-speed shutter position specification ? data = 0 data = 1 10000001 enabled other values disabled see the category section. ?? see the electronic shutter section. see the electronic shutter section. see the electronic shutter section. ?? shutter data rst all 0 0 0 all 0 all 0 all 0 all 0
? 16 ? CXD3615R detailed description of each data shared data: d08 ctg [category] of the data provided to the CXD3615R by the serial interface, the CXD3615R loads d09 and subsequent data to each data register as shown in the table below according to d08 . d08 0 1 description of operation loading to control data register loading to shutter data register note that the CXD3615R can apply these categories consecutively within the same vertical period. however, care should be taken as the data is overwritten if the same category is applied. control data: d12 and d13 mode [drive mode] the CXD3615R realizes various drive modes using control data d12 and d13 mode, d16 ntpl and d17 ccd. the drive mode-related bits are loaded to the CXD3615R and reflected at the falling edge of vr. the details are described below. first, the various basic drive modes are shown below. these modes are switched using control data d12 and d13 mode. ? 1 these are both test mode for the icx434. draft mode is the pulse elimination drive mode in the icx432/434. af mode is the pulse eliminator drive mode based on draft mode, and is a high frame rate drive mode that can be used for purposes such as auto focus (af). frame mode is the icx432/434 drive mode in which the data for all lines are read. in addition to these modes, the CXD3615R has functions for switching the applicable ccd with d17 ccd, and for switching vr/hr to ntsc equivalent or pal equivalent with d16 ntpl. control data: d31 fld [wen/fld output switching] the wen/fld pin (pin 5) output can be switched to the wen pulse or the fld pulse. the default is "wen". see the timing charts for the wen pulse. the fld pulse rises in the readout block in the a field, and falls in the horizontal period immediately thereafter. that is to say, fld is a 1h high-active pulse. the transition points are the same as for id/wen. d13 0 0 1 1 d12 0 1 0 1 description of operation draft mode (default) frame mode af mode ? 1 test mode hr vck fld
? 17 ? CXD3615R control data: d32 fgob [wide obclp generation] this controls wide obclp generation during the vertical opb period. when this function is on, the d34 and d35 ptob setting is invalid for the output block. see the timing charts for the actual operation. the default is "off". d32 0 1 description of operation wide obclp generation off wide obclp generation on control data d34 and d35 ptob [obclp waveform pattern] this designates the obclp waveform pattern. the default is "normal". see the timing charts for details of the decoding values. control data: d36 and d37 ldad [adclk logic phase] this indicates the adclk logic phase adjustment data. the default is "90 " relative to mcko. d37 0 0 1 1 d36 0 1 0 1 degree of adjustment ( ) 0 90 180 270 control data: d38 and d39 stb [standby] the operating mode is switched as follows. however, the standby bits are loaded to the CXD3615R and control is applied immediately at the rising edge of sen. see the pin status table for the pin status in each mode. d39 0 0 1 1 d38 0 1 0 1 operating mode cam slp sst stb normal operating mode sleep mode siesta mode standby mode symbol d35 0 0 1 1 d34 0 1 0 1 waveform pattern (normal) (shifted rearward) (shifted forward) (wide) icx432 20 to 44 14 to 38 26 to 50 14 to 50 icx434 19 to 45 13 to 39 25 to 51 13 to 51
? 18 ? CXD3615R control data/shutter data: [electronic shutter] the CXD3615R realizes various electronic shutter functions by using control data d20 smd and d21 htsg and shutter data d10 to d19 svr, d20 to d31 shr and d32 to d41 spl. these functions are described in detail below. first, the various modes are shown below. these modes are switched using control data d20 smd. d20 0 1 description of operation electronic shutter stopped mode electronic shutter mode the electronic shutter data is expressed as shown in the table below using d20 to d31 shr as an example. however, msb (d31) is a reserved bit for the future specification, and is handled as a dummy bit on this ic. shr is expressed as 1c3h . [electronic shutter stopped mode] during this mode, all shutter data items are invalid. sub is not output in this mode, so the shutter speed is the accumulation time for one field. [electronic shutter mode] during this mode, the shutter data items have the following meanings. symbol svr shr spl data shutter: d10 to d19 shutter: d20 to d31 shutter: d32 to d41 description number of vertical periods specification (000h svr 3ffh) number of horizontal periods specification (000h shr 7ffh) vertical period specification for high-speed shutter operation (000h spl 3ffh) note) the bit data definition area is assured in terms of the CXD3615R functions, and does not assure the ccd characteristics. the period during which svr and shr are specified together is the shutter speed. an image of the exposure time calculation formula is shown below. in actual operation, the precise exposure time is calculated from the operating frequency, vr and hr periods, decoding value during the horizontal period, and other factors. (exposure time) = svr (1v period) + {(number of hr per 1v) ? (shr + 1)} (1h period) + (distance from sub to sg during the readout period) concretely, when specifying high-speed shutter, svr is set to "000h". (see the figure.) during low-speed shutter, or in other words when svr is set to "001h" or higher, the serial interface data is not loaded until this period is finished. the vertical period indicated here corresponds to one field in each drive mode. in addition, the number of horizontal periods applied to shr can be considered as (number of sub pulses ? 1). the readout period is normally the horizontal period during which v1, v3a/b and v5a/b (for the icx432) are ternary values, and sg indicates these ternary level readout pulses. msb d31 x d30 0 d29 0 d28 1 d27 1 d26 1 d25 0 d24 0 lsb 1 c d23 0 d22 0 d21 1 d20 1 3
? 19 ? CXD3615R vr shr 1 v3a sub wen smd 000h 002h svr 050h 10fh shr 1 svr exp exposure time vr shr 000 001 002 1 v3a sub wen smd 000h 001h spl 0a3h 10fh shr 000h 002h svr 1 svr exp exposure time spl further, spl can be used during this mode to specify the sub output at the desired vertical period during the low-speed shutter period. in the case below, sub is output based on shr at the spl vertical period out of (svr + 1) vertical periods. incidentally, spl is counted as "000h", "001h", "002h" and so on in conformance with svr. using this function it is possible to achieve smooth exposure time transitions when changing from low-speed shutter to high-speed shutter or vice-versa.
? 20 ? CXD3615R vr 0 v3a sub wen htsg 1 0 smd 1 1 0 exp exposure time [htsg control mode] this mode controls the v1, v3a/b and v5a/b (for the icx432) ternary level outputs (readout pulse block) using d21 htsg. d21 0 1 description of operation readout pulse (sg) normal operation htsg control mode [exp pulse] the id/exp pin (pin 4) output can be switched between the id pulse or the exp pulse using d33 exp. the default is the "id" pulse. see the timing charts for the id pulse. the exp pulse indicates the exposure time when it is high. in principle, the transition points are the last sub pulse falling edge and the readout pulse falling edge, that is to say from the time the charge is completely discharged until transfer ends. however, when the readout pulse timing differs within the same readout block such as in draft mode, the average value is used. then, when there is no sub pulse in the next field, the readout pulse falling edge is defined as the start position. however, in this case the transition points overlap and disappear, so a tentative start position is defined. this is shown below. [icx432] [icx434] frame mode draft/af mode frame mode draft mode sg 1460 1682 a: 1071 b: 1175 1123 tentative start position 1480 1784 1091 1195 1175 see the exp pulse indicated in the explanatory diagrams under [electronic shutter] for an image of operation.
? 21 ? CXD3615R chart-a1 vertical direction timing chart mode frame mode applicable ccd image sensor icx432 ? the number of sub pulses is determined by the serial interface data. this chart shows the case where sub pulses are output in e ach horizontal period. ? id/exp of this chart shows id. id is low for lines where ccd out contains the r component, and high for lines where ccd out con tains the b component. in this drive mode, id is reset to (high, low, high) in the horizontal periods of each readout block (a, b, c). ? wen/fld of this chart shows wen. ? the shaded portion of obclp shows the range over which the wide obclp can be set by the serial interface data. ? vr of this chart is ntsc equivalent pattern 587h (1h: 2760ck) + 1500ck units. for pal equivalent pattern, it is 704h + 960ck un its. 11 1 high-speed sweep block high-speed sweep block high-speed sweep block c field a field b field ab c d 1548 1545 1236 9 6 3 8 5 2 1550 1547 8 5 2 7 4 1 4 1 6 3 vr sub hr v1 v2 v3a v3b v4 v5b v5a v6 ccd out pblk obclp wen/fld id/exp clpdm 1549 1546 588 588 564 588 565 564 43 43 43
? 22 ? CXD3615R chart-a2 vertical direction timing chart mode draft mode applicable ccd image sensor icx432 ? the number of sub pulses is determined by the serial interface data. this chart shows the case where sub pulses are output in e ach horizontal period. ? id/exp of this chart shows id. id is low for lines where ccd out contains the r component, and high for lines where ccd out con tains the b component. in this drive mode, id is reset to low in the horizontal periods of each readout block (e). ? wen/fld of this chart shows wen. ? the shaded portion of obclp shows the range over which the wide obclp can be set by the serial interface data. ? vr of this chart is ntsc equivalent pattern 269h (1h: 3004ck) + 2734ck units. for pal equivalent pattern, it is 323h + 1708ck u nits. e e 1 1 1534 1541 1546 4 1 8 13 20 25 28 1544 1537 1532 1525 1546 1541 1534 1527 1549 6 5 10 17 22 29 30 4 1 8 13 20 25 28 6 5 10 17 22 29 30 vr sub hr v5a v3b v3a v2 v1 v5b v4 v6 ccd out pblk obclp wen/fld id/exp clpdm 1544 1537 1532 1549 270 263 270 263 3 3
? 23 ? CXD3615R chart-a3 vertical direction timing chart mode af mode applicable ccd image sensor icx432 ? the number of sub pulses is determined by the serial interface data. this chart shows the case where sub pulses are output in e ach horizontal period. ? id/exp of this chart shows id. id is low for lines where ccd out contains the r component, and high for lines where ccd out con tains the b component. in this drive mode, id is reset to high in the horizontal periods of each readout block (e). ? wen/fld of this chart shows wen. ? the shaded portion of obclp shows the range over which the wide obclp can be set by the serial interface data. ? vr of this chart is ntsc equivalent pattern 134h (1h: 3004ck) + 2869ck units. for pal equivalent pattern, it is 161h + 2356ck u nits. in addition, for pal equivalent pattern, the high-speed sweep block starts from 150h. 1 1 ef 1525 488 481 490 485 1527 46 4 6 vr sub hr v5a v3b v3a v2 v1 v5b v4 v6 ccd out pblk obclp wen/fld id/exp clpdm g ef g high-speed sweep block frame shift block high-speed sweep block frame shift block 135 27 123 27 135 123 3 3
? 24 ? CXD3615R chart-a4 horizontal direction timing chart mode frame mode applicable ccd image sensor icx432 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 2.2 to 26.5s (when the drive frequency is 24.3mhz). this chart shows a peri od of 104ck (4.3s). ? sub is output at the timing shown above when output is controlled by the serial interface data. ? id and wen are output at the timing shown above at the position shown in chart-a1. ? obclp also has patterns of 14-38, 26-50 and 14-50 for a total of four patterns. obclp (wide) is output in the shaded portions s hown in chart-a1. these timings can be switched by the serial interface data. (2760) 0 100 200 300 400 500 600 700 672 676 680 52 5 800 900 1000 644 hr h1 mcko v1 h2 v2 v3a/b v4 v5a/b v6 sub pblk obclp wen/fld id/exp clpdm obclp (wide) 182 308 266 392 350 476 434 560 140 518 224 602 52 135 52 670 20 44 646 670 50 140 140 674
? 25 ? CXD3615R chart-a5 horizontal direction timing chart mode draft/af mode applicable ccd image sensor icx432 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 2.2 to 26.5s (when the drive frequency is 24.3mhz). this chart shows a peri od of 104ck (4.3s). ? sub is output at the timing shown above when output is controlled by the serial interface data. ? id and wen are output at the timing shown above at the position shown in chart-a2 and a3. ? obclp also has patterns of 14-38, 26-50 and 14-50 for a total of four patterns. obclp (wide) is output in the shaded portions s hown in chart-a2 and a3. these timings can be switched by the serial interface data. (3004) 0 100 200 300 400 500 600 700 916 924 52 5 800 900 1000 888 920 hr h1 mcko v1 h2 v2 v3a/b v4 v5a/b v6 sub pblk obclp wen/fld id/exp clpdm obclp (wide) 171 264 543 636 233 326 605 698 295 388 667 760 357 450 729 822 419 512 140 791 481 574 202 853 52 135 52 914 20 44 890 914 50 140 140 918
? 26 ? CXD3615R chart-a6 horizontal direction timing chart (high-speed sweep: d) mode frame mode applicable ccd image sensor icx432 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 2.2 to 26.5s (when the drive frequency is 24.3mhz). this chart shows a peri od of 104ck (4.3s). (2760) 0 100 200 (2760) 0 100 200 300 400 52 5 52 5 #1 #2 #3 #1039 #1040 hr h1 mcko v1 h2 v2 v3a/b v4 v5a/b v6 sub pblk obclp wen/fld id/exp clpdm 52 135 52 135 140 176 248 284 356 392 1952 1988 182 2060 158 194 266 302 374 410 1970 2006 176 212 284 320 392 428 1988 2024 194 230 302 338 410 446 2006 2042 212 248 320 356 428 2024 1952 140 230 266 338 374 446 1970 2042 224 140 158
? 27 ? CXD3615R chart-a7 horizontal direction timing chart (frame shift: f) mode af mode applicable ccd image sensor icx432 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 2.2 to 26.5s (when the drive frequency is 24.3mhz). this chart shows a peri od of 104ck (4.3s). ? sub is output at the timing shown above when output is controlled by the serial interface data. ? frame shift of v1, v2, v3a/b, v4, v5a/b and v6 is performed up to 24h 1096ck (#78). (3004) 0 100 200 300 400 500 600 700 916 924 52 5 800 900 1000 888 920 hr h1 mcko v1 h2 v2 v3a/b v4 v5a/b v6 sub pblk obclp wen/fld id/exp clpdm 171 264 543 636 915 1008 233 326 605 698 977 295 388 667 760 1039 357 450 729 822 419 512 791 884 481 574 202 853 946 52 135 #1 #2 140
? 28 ? CXD3615R chart-a8 horizontal direction timing chart (high-speed sweep: g) mode af mode applicable ccd image sensor icx432 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 2.2 to 26.5s (when the drive frequency is 24.3mhz). this chart shows a peri od of 104ck (4.3s). ? sub is output at the timing shown above when output is controlled by the serial interface data. ? high-speed sweep of v1, v2, v3a/b, v4, v5a/b and v6 is performed up to 133h 2932ck (#114). (3004) 0 100 200 300 400 500 600 700 916 924 52 5 800 900 1000 888 920 hr h1 mcko v1 h2 v2 v3a/b v4 v5a/b v6 sub pblk obclp wen/fld id/exp clpdm 152 188 296 332 440 476 584 620 728 764 872 908 1016 1052 176 212 320 356 464 500 608 644 752 788 896 932 1040 200 236 344 380 488 524 632 668 776 812 920 956 224 260 368 404 512 548 656 692 800 836 944 980 248 284 392 428 536 572 680 716 824 860 968 1004 140 272 308 416 452 560 596 704 740 848 884 992 1028 164 52 135 #1 #2 #3 140
? 29 ? CXD3615R chart-a9a horizontal direction timing chart mode frame mode applicable ccd image sensor icx432 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 2.2 to 26.5s (when the drive frequency is 24.3mhz). this chart shows a peri od of 104ck (4.3s). (2760) 0 (2760) 0 1254 1296 1338 1380 1420 1460 1502 1546 140 182 224 266 308 350 392 434 476 518 560 602 hr v1 v2 v3a/b v4 v5a/b v6 v1 b field a field [b] [a] v2 v3a/b v4 v5a/b v6
? 30 ? CXD3615R chart-a9b horizontal direction timing chart mode frame mode applicable ccd image sensor icx432 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 2.2 to 26.5s (when the drive frequency is 24.3mhz). this chart shows a peri od of 104ck (4.3s). (2760) 0 (2760) 0 1086 1128 1170 1212 1254 1296 1338 1380 1420 1460 140 182 224 266 308 350 392 434 476 518 560 602 hr v1 v2 v3a/b v4 v5a/b v6 c field [c]
? 31 ? CXD3615R chart-a10 horizontal direction timing chart mode draft/af mode applicable ccd image sensor icx432 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 2.2 to 26.5s (when the drive frequency is 24.3mhz). this chart shows a peri od of 104ck (4.3s). (3004) 0 1407 1438 1469 1500 1540 1580 1611 1642 1673 1704 1744 1784 1815 1846 1877 1908 (3004) 0 140 171 202 233 264 295 326 357 388 419 450 481 512 543 574 605 636 667 698 729 hr v1 v2 v3a v3a v4 v5a [e] v5b v6
? 32 ? CXD3615R chart-a11 vertical direction sequence chart mode draft frame draft applicable ccd image sensor icx432 ? this chart is a drive timing chart example of electronic shutter normal operation. ? data exposed at b includes the blooming component. for details, see the ccd image sensor data sheet. ? the CXD3615R does not generate the pulse to control mechanical shutter operation. ? the switching timing of drive mode and electronic shutter data is not the same. ccd out sub vr mechanical shutter 00 mode 00 00 10 10 10 00 00 a b c (1st) close c (2nd) c (3rd) open d 1 smd 1 1 0 0 0 1 1 050h shr 050h 050h 000h 000h 000h 050h 050h a d b c v1 v2 v3a v3b v4 v5a v5b v6
? 33 ? CXD3615R chart-b1 vertical direction timing chart mode frame mode applicable ccd image sensor icx434 ? the number of sub pulses is determined by the serial interface data. this chart shows the case where sub pulses are output in e ach horizontal period. ? id/exp of this chart shows id. id is low for lines where ccd out contains the r component, and high for lines where ccd out con tains the b component. in this drive mode, id is reset to (low, high) in the horizontal periods of each readout portion (a, b). ? wen/fld of this chart shows wen. ? vr of this chart is ntsc equivalent pattern 650h (1h: 1848ck) units. for pal equivalent pattern, it is 779h + 408ck units. ? this chart shows the pin configuration for the icx434. (see page 4.) a c 1 1 b high-speed sweep block high-speed sweep block b field a field c 1228 1230 1232 1234 1236 3 1 5 7 9 1 3 5 7 9 11 13 15 17 19 21 23 25 27 1227 1225 1229 1231 1233 1235 2 4 6 8 10 2 4 6 8 10 12 vr sub hr v1a v1b v2 v3a v3b v4 ccd out pblk obclp wen/fld id/exp clpdm 650 650 25 31 24 31
? 34 ? CXD3615R chart-b2 vertical direction timing chart mode draft mode applicable ccd image sensor icx434 ? the number of sub pulses is determined by the serial interface data. this chart shows the case where sub pulses are output in e ach horizontal period. ? id/exp of this chart shows id. id is low for lines where ccd out contains the r component, and high for lines where ccd out con tains the b component. in this drive mode, id is reset to high in the horizontal period of the readout portion. ? wen/fld of this chart shows wen. ? vr of this chart is ntsc equivalent pattern 325h (1h: 1848ck) units. for pal equivalent pattern, it is 389h + 1128ck units. ? this chart shows the pin configuration for the icx434. (see page 4.) d d 1 1 1207 1210 1215 1218 1223 1226 1231 1234 4 9 2 7 10 15 18 23 26 31 34 39 42 47 50 55 58 63 1207 1202 1210 1215 1218 1223 1226 1231 1234 4 9 2 7 10 15 18 23 26 31 34 vr sub hr v1a v1b v2 v3a v3b v4 ccd out pblk obclp wen/fld id/exp clpdm 325 325 12 16 12 16
? 35 ? CXD3615R chart-b3 horizontal direction timing chart mode frame mode applicable ccd image sensor icx434 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 3.1 to 10.4s (when the drive frequency is 18mhz). this chart shows a period of 104ck (5.8s). ? sub is output at the timing shown above when output is controlled by the serial interface data. ? id and wen are output at the timing shown above at the position shown in chart-b1. ? obclp also has patterns of 13-39, 25-51 and 13-51 for a total of four patterns. obclp (wide) is output in the shaded portions s hown in chart-b1. these timings can be switched by the serial interface data. ? this chart shows the pin configuration for the icx434. (see page 4.) (1848) 0 50 100 150 200 250 188 56 hr h1 mcko v1a/b h2 v2 v3a/b v4 sub pblk obclp obclp (wide) clpdm wen/fld id/exp 72 120 104 152 136 56 88 152 88 168 56 214 19 45 51 216 190 214 104 104
? 36 ? CXD3615R chart-b4 horizontal direction timing chart mode draft mode applicable ccd image sensor icx434 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 3.1 to 10.4s (when the drive frequency is 18mhz). this chart shows a period of 104ck (5.8s). ? sub is output at the timing shown above when output is controlled by the serial interface data. ? id and wen are output at the timing shown above at the position shown in chart-b2. ? obclp also has patterns of 13-39, 25-51 and 13-51 for a total of four patterns. obclp (wide) is output in the shaded portions s hown in chart-b2. these timings can be switched by the serial interface data. ? this chart shows the pin configuration for the icx434. (see page 4.) (1848) 0 50 100 150 200 250 188 hr h1 mcko v1a/b h2 v2 v3a/b v4 sub pblk obclp obclp (wide) clpdm wen/fld id/exp 56 56 88 120 152 72 104 136 168 88 120 56 152 88 152 104 136 72 168 56 214 19 45 51 216 190 214 104 104
? 37 ? CXD3615R chart-b5 horizontal direction timing chart (high-speed sweep: c) mode frame mode applicable ccd image sensor icx434 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 3.1 to 10.4s (when the drive frequency is 18mhz). this chart shows a period of 104ck (5.8s). ? sub is output at the timing shown above when output is controlled by the serial interface data. ? id and wen are output at the timing shown above at the position shown in chart-b1. ? high-speed sweep of v1a/b, v2, v3a/b and v4 is performed up to 22h 1848ck (#758). ? this chart shows the pin configuration for the icx434. (see page 4.) #1 #2 #3 #4 (1848) 0 50 100 150 200 250 188 hr h1 mcko v1a/b h2 v2 v3a/b v4 sub pblk obclp clpdm wen/fld id/exp 88 152 56 56 84 112 140 168 196 224 252 70 98 126 154 182 210 238 266 70 98 126 154 182 210 238 266 56 84 112 140 168 196 224 252
? 38 ? CXD3615R chart-b6 horizontal direction timing chart mode frame mode applicable ccd image sensor icx434 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 3.0 to 13.4s (when the drive frequency is 18mhz). this chart shows a period of 104ck (5.8s). ? this chart shows the pin configuration for the icx434. (see page 4.) (1848) 0 56 72 88 104 120 136 152 168 184 200 216 (1848) 0 56 72 88 104 120 136 152 168 1027 1029 1071 1091 1131 1133 1175 logical alignment hr v1a v1b v2 v3a v3b v4 v1a b field a field [b] [a] v1b v2 v3a v3b v4
? 39 ? CXD3615R chart-b7 horizontal direction timing chart mode draft mode applicable ccd image sensor icx434 ? hr of this chart indicates the actual CXD3615R load timing. ? the numbers at the output pulse transition points indicate the count at the mcko rise from the fall of hr. ? the hr fall period should be between approximately 3.1 to 10.4s (when the drive frequency is 18mhz). this chart shows a period of 104ck (5.8s). ? this chart shows the pin configuration for the icx434. (see page 4.) (1848) 0 56 72 88 104 120 136 152 168 (1848) 0 56 72 88 104 120 136 152 168 1027 1029 1071 1091 1131 1111 1133 1175 hr v1a v1b v2 v3a v3b v4 [d]
? 40 ? CXD3615R chart-b8 vertical direction sequence chart mode draft frame draft applicable ccd image sensor icx434 ? this chart is a driving timing chart example of electronic shutter normal operation. ? data exposed at d includes the blooming component. for details, see the ccd image sensor data sheet. ? the CXD3615R does not generate the pulse to control mechanical shutter operation. ? the switching timing of drive mode and electronic shutter data is not the same. ? this chart shows the pin configuration for the icx434. (see page 4.) ccd out sub vr mechanical shutter 050h shr 050h 050h 00 1 050h 00 1 050h 050h 050h 050h 050h a f b c d e 00 mode 00 00 10 00 00 abcd close ee open f 10 1 smd 1 1 0 0 1 1 v1a v1b v2 v3a v3b v4
? 41 ? CXD3615R chart-z high-speed phase timing chart mode applicable ccd image sensor icx432/icx434 ? hr' indicates the hr which is the actual CXD3615R load timing. ? the phase relationship of each pulse shows the logical position relationship. for the actual output waveform, a delay is added to each pulse. ? the logical phase of adclk can be specified by the serial interface data. cki hr' hr cko rg xshd xshp adclk mcko h1 1 h2 56/52 188/644/888
? 42 ? CXD3615R application circuit block diagram 26 18 21 31 32 34 35 30 25 23 22 20 19 17 16 mcko vr hr cko d0 to d9 10 adclk obclp clpdm pblk xshd xshp sck 33 sen ssi test2 test1 cki ccd out v-dr ssg 6 3 2 5 4 ssgsl sncsl rst wen/fld id/exp 12 13 9 rg h2 h1 38 39 40 v5a v2 v4 42 43 44 v3a 46 47 48 v3b v6 sub ? v1 and v2 only for icx432 v1 v5b ccd icx432 icx434 s/h a/d tg CXD3615R controller signal processor block notes for power-on of the three ? 7.5v, +15.0v, +3.3v power supplies, be sure to start up the ? 7.5v and +15.0v power supplies in the following order to prevent the sub pin of the ccd image sensor from going to negative potential. t1 t2 15.0v 0v ? 7.5v 20% 20% t2 t1 application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
? 43 ? CXD3615R sony corporation sony code eiaj code jedec code package material lead treatment lead material package mass epoxy resin copper alloy package structure 48pin lqfp (plastic) 9.0 0.2 ? 7.0 0.1 1 12 13 24 25 36 37 48 (0.22) 0.18 ? 0.03 + 0.08 0.2g lqfp-48p-l01 p-lqfp48-7x7-0.5 (8.0) 0.5 0.2 0.127 ? 0.02 + 0.05 a 1.5 ? 0.1 + 0.2 0.1 palladium plating note: dimension ? ? ? does not include mold protrusion. 0.1 0.1 0.5 0.2 0? to 10? detail a 0.13 m 0.5 s s b detail b : palladium 0.127 0.04 0.18 0.03 package outline unit: mm

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